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Intel Chip Ushers 'Era of Tera'
Techtree News Staff, Feb 12, 2007 1236 hrs ISTIntel has developed a chip dubbed "Tera Research Chip" that promises to deliver supercomputer-like performance and consume less electricity.
Intel has developed a chip dubbed "Tera Research Chip" that promises to deliver supercomputer-like performance and consume less electricity.
Being labeled as the world's first programmable processor, this 80-core chip is the result of Intel's "Tera-scale computing" research aimed at delivering Teraflops (trillions of calculations per second) performance for future PCs and servers.
The 80-core research chip achieves teraflops of performance while consuming only 62 watts, which is less than that consumed by many single-core processors today. It offers specific insights into new silicon design methodologies, high-bandwidth interconnects, and energy management approaches.
Intel believes that Tera-scale performance, and the ability to move terabytes of data, will play a pivotal role in future PCs with everywhere access to the Internet by powering new applications for education and collaboration, as well as enabling the rise of HD entertainment on PCs, servers, and handheld devices.
The company has no plans to bring this exact chip designed with floating point cores to market. However, the Tera-scale research is active in investigating new innovations in processor or core functions, the types of chip-to-chip and chip-to-computer interconnects required to best move data. Also, it is active in finding, how software needs to be designed to best leverage multiple processor cores.
The first time Teraflops performance was achieved was in 1996, on the ASCI Red Supercomputer by Intel for the Sandia National Laboratory. Taking more than 2,000 square feet, the computer was powered by nearly 10,000 Pentium Pro processors, and consumed over 500 kilowatts of electricity.
Interestingly, the new research chip achieves the same performance on a multi-core chip.
The chip features an innovative tile design in which smaller cores are replicated as "tiles," thus making it easier to design a chip with many cores. It also features a mesh-like "network-on-chip" architecture that allows super-high bandwidth communications between the cores and is capable of moving Terabits of data per second inside the chip.
For more energy efficiency, the research has investigated methods to power cores on and off independently, so only the ones needed to complete a task are used.
The technical details have not been released yet, but are scheduled to be presented at the annual Integrated Solid State Circuits Conference (ISSCC) this week in San Francisco.
Also Read:
Intel Improves Upon 45nm Chips
Being labeled as the world's first programmable processor, this 80-core chip is the result of Intel's "Tera-scale computing" research aimed at delivering Teraflops (trillions of calculations per second) performance for future PCs and servers.
The 80-core research chip achieves teraflops of performance while consuming only 62 watts, which is less than that consumed by many single-core processors today. It offers specific insights into new silicon design methodologies, high-bandwidth interconnects, and energy management approaches.
Intel believes that Tera-scale performance, and the ability to move terabytes of data, will play a pivotal role in future PCs with everywhere access to the Internet by powering new applications for education and collaboration, as well as enabling the rise of HD entertainment on PCs, servers, and handheld devices.
The company has no plans to bring this exact chip designed with floating point cores to market. However, the Tera-scale research is active in investigating new innovations in processor or core functions, the types of chip-to-chip and chip-to-computer interconnects required to best move data. Also, it is active in finding, how software needs to be designed to best leverage multiple processor cores.
The first time Teraflops performance was achieved was in 1996, on the ASCI Red Supercomputer by Intel for the Sandia National Laboratory. Taking more than 2,000 square feet, the computer was powered by nearly 10,000 Pentium Pro processors, and consumed over 500 kilowatts of electricity.
Interestingly, the new research chip achieves the same performance on a multi-core chip.
The chip features an innovative tile design in which smaller cores are replicated as "tiles," thus making it easier to design a chip with many cores. It also features a mesh-like "network-on-chip" architecture that allows super-high bandwidth communications between the cores and is capable of moving Terabits of data per second inside the chip.
For more energy efficiency, the research has investigated methods to power cores on and off independently, so only the ones needed to complete a task are used.
The technical details have not been released yet, but are scheduled to be presented at the annual Integrated Solid State Circuits Conference (ISSCC) this week in San Francisco.
Also Read:
Intel Improves Upon 45nm Chips
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Amit Agrawal
,Zurich, on Feb 26, 2007 01:59 PM
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Dinesh
,Pune, on Feb 14, 2007 01:53 AM
Dams
,Mumbai, on Feb 12, 2007 01:45 PM
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